An IC-package, such as a ball grid array package, includes a substrate having a first surface and a second surface. A chip is mounted on a surface and ball pads, conducting traces and solder masks on the other surface wherein the conducting traces are disposed in between the adjacent ball pads, and are covered by the solder mask. A portion of each of the ball pads is also covered by the solder mask. The solder mask is produced by photolithographic structuring and developing of an epoxy resin.
The solder mask includes openings positioned in the area corresponding to the ball pads, wherein the opening exposes an opening of the surface of the substrate, the ball pad and a portion of the side wall of the wall pad. The chip is disposed on the second surface of the substrate and is sealed and encapsulated by the insulated material such as a mold compound. The solder balls are disposed on the first surface of the substrate and are positioned at the openings of the ball pads. Additionally, the solder balls are electrically connected to a portion of the side wall of the ball pads disposed at the ball pad openings. Such an IC-package is described in US Patent Application No. 2002/0111054 A1, which is incorporated herein by reference.
A similar semiconductor package is known from in US Patent Application Publication 2003/0227083, which is incorporated herein by reference. This package exhibits an increased resistance force of the solder ball of a BGA package mounted on a PCB against shear stress.
The solder mask used in the prior art has already been omitted on the side of the substrate. But there is still a ring of solder mask on the side, which causes problems due to the uneven height of the solder mask ring (different bond line thickness). The unevenness of the solder mask ring is process related at the supplier's side.
The uneven distribution of the soldermask on the chipside and on the ballside of the substrate cause a high warpage of the substrate, which is very critical for assembly processes, like wire bonding or die bonding (i.e. multi chip packages). So, the die thickness or the mold cap clearance (thickness of the mold layer above the die surface) must be adjusted for each product individually.
Furthermore, the main reason for the reduced reliability goes back to the presence of the solder mask. The solder mask takes up a high load of humidity in the soaking during the preconditioning. Therefore pre-baking steps during assembly process are necessary to release the humidity during the curing process without forming bubbles (very long curing process with a special ramp up) and the curing processes must be adjusted to each product individually.